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  3. Vol. E90-A, No. 4 April 2007 /
  4. Papers

Gate-Level Register Relocation in Generalized Synchronous Framework for Clock Period Minimization

Authors

  • Yukihide KOHIRA
  • Atsushi TAKAHASHI

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Published

2007-04-01

Issue

Vol. E90-A, No. 4 April 2007

Section

Papers

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