A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI

Authors

• Yasue YAMAMOTO
• Masanori SHIRAHAMA
• Toshiaki KAWASAKI
• Ryuji NISHIHARA
• Shinichi SUMI
• Yasuhiro AGATA
• Hirohito KIKUKAWA
• Hiroyuki YAMAUCHI